☀️ Solar Power: From Photon to Socket

What you’ll learn

1. The Coin, Not the StreamUnderstand the photoelectric effect as an all-or-nothing transaction — one photon, one electron, at a price set by colour — and recognise it as the design constraint behind everything in solar power.A dim violet lamp frees electrons from a metal plate instantly; a blinding red lamp never does, however long it runs. Wave theory said brightness should eventually suffice, and it is simply wrong: Einstein's 1905 proposal (his actual 1921 Nobel subject) was that light arrives as indivisible photons of energy E = hf, so colour fixes the size of the coin and brightness only fixes how many arrive. An electron is paid by exactly one photon and cannot combine small ones, which makes sunlight a population of fixed-denomination coins rather than a quantity of energy — the fact every later limit in this course descends from.
2. The GapExplain the band gap as an engineered price, and derive the two — and only two — ways a photon can fail a semiconductor.In a crystal, electrons occupy a valence band or a conduction band with a forbidden gap between; crossing it requires full payment by a single photon. Silicon's gap of about 1.12 eV (near 1,100 nm) means the cell is literally transparent to lower-energy infrared — not poorly absorbing, transparent — while a photon above the gap is absorbed and thermalises its surplus to heat within picoseconds because the coin cannot be broken. A promoted electron is still not electricity: in a uniform slab the electron and its hole simply wander and recombine into warmth, so the crystal needs a preferred direction it does not yet have.
3. The One-Way StreetExplain the p-n junction's built-in field as the one-way street that turns a promoted electron into a current, and understand why a cell's voltage is independent of its area.Doping silicon with phosphorus (n-type) or boron (p-type) makes two neutral regions rich in opposite mobile carriers; joining them lets carriers diffuse and annihilate, stranding locked ionised dopant sites that raise a permanent built-in electric field across a depletion region. That field is the crystal's preferred direction: it sweeps photo-generated electrons and holes apart before they can recombine, so the photon pays the toll and the junction chooses the direction — a cell is a pump, not a source of electrons. Because the voltage is set by the junction barrier rather than by area, every silicon cell gives about 0.6 V regardless of size, which is why modules wire 60–72 cells in series.
4. The Two Losses You Cannot Design AwayDerive the Shockley–Queisser limit from the two opposing photon losses, and recognise it as a physics ceiling rather than an engineering one.Shockley and Queisser (1961) assumed a defect-free, loss-free cell and still found a hard ceiling, because below-gap photons pass through (about 19% of AM1.5) while above-gap photons thermalise their surplus (about 33%) — and lowering the gap to fix the first worsens the second. The optimum sits near 1.34 eV at about 33.16% for a single junction under unconcentrated light; spectrum losses alone would allow about 48%, with the rest lost to radiative recombination and the voltage–current trade-off. Silicon's 1.12 eV gap is a near-optimum accident of the transistor industry's supply chain, and the best silicon cell ever measured — 26.63% in 2017 — sits about 90% of the way to silicon's own 29.43% intrinsic limit.
5. Breaking the Limit Means Breaking an AssumptionUnderstand multijunction and tandem cells as attacks on the Shockley–Queisser limit's stated assumptions, and account honestly for the gap between a record cell and a purchasable module.The limit constrains a single junction under unconcentrated light, and each qualifier is a door: stacking a wide-gap cell above a narrow-gap one lets each photon meet a price nearer its own value, using the below-gap transparency of Lesson 2 as the delivery mechanism. Limits rise to about 42% for two junctions, 49% for three, 68.7% for an infinite stack, and 86.8% with maximum concentration; real records include a 47.6% four-junction concentrator cell (Fraunhofer ISE, May 2022) and a 32.5% perovskite-silicon tandem (2022) that exceeds anything silicon alone could reach. Commercial modules reached about 24.5% as of 2025, and the gap from record to module is the honest cost of area, interconnection, reflection, and twenty-five-year survival.
6. Why Panels Hate HeatExplain why photovoltaic output falls with temperature, and connect the heat penalty back to the thermalisation loss that sets the efficiency ceiling.A PV panel is not a thermal collector: deserts suit solar because they are sunny, not because they are hot. Heat generates carriers across the gap on both sides of the junction with no photons involved, eroding the p–n contrast that sustains the built-in voltage, so open-circuit voltage falls — from about 0.60 V at a 25 °C cell to about 0.55 V at the ~45 °C a cell reaches in full sun, roughly 8% of the voltage. Since every nameplate rating is measured at Standard Test Conditions with a 25 °C cell — a laboratory fiction requiring active refrigeration in full sun — real arrays are mounted on standoffs to let convection carry heat away, and the thermalisation loss that caps the cell at 33% is itself the heat that drags it below that ceiling.
7. The Inverter Earns Its KeepUnderstand the I-V curve's maximum power point as a moving target, and the inverter as the device that tracks it, synchronises to the grid, and refuses to endanger lineworkers.Both ends of a panel's I-V curve produce zero watts — maximum current at zero volts, maximum voltage at zero current — so all the power lives at a knee between them, and that knee shifts with irradiance, temperature and shading, sometimes splitting into multiple local peaks. Inverters chase it with maximum power point tracking, typically the humble perturb-and-observe loop that nudges the operating voltage and keeps whichever direction increased power. The inverter also synthesises grid-synchronous AC, and performs anti-islanding — shutting down within milliseconds of losing the grid so it cannot back-feed a line a lineworker believes is dead, which is why grid-tied arrays go dark in a blackout — while deliberate DC:AC oversizing accepts midday clipping to fatten the day's shoulders.
8. The Duck Is Not the Panel's FaultRead the duck curve as a grid-timing problem rather than a panel problem, and understand curtailment and value deflation as consequences of correlated, clock-driven supply.CAISO coined the duck curve in 2012 by plotting net load — demand minus wind and solar — which sags at midday and rears up in the evening; by 2020 that evening ramp ran roughly 10–17 GW in about three hours, and it is steepest on the sunniest days because a deeper belly is a longer climb. Nothing malfunctions: all panels in a region share one sun, so their output is near-perfectly correlated, and electricity has no warehouse — supply must match demand instant by instant. The results are curtailment, negative midday prices, and value deflation, illustrated by California's 5–8 p.m. wholesale prices rising to around $60/MWh against about $35 in that window in 2016 while midday ran near $15 — evidence that solar worked and that the bottleneck moved from making energy to keeping it.

Questions this course answers

Grounded in trusted sources

• Wikipedia — Photoelectric effect (E = hf; threshold behaviour; Einstein 1905, Nobel Prize 1921): https://en.wikipedia.org/wiki/Photoelectric_effect
• Wikipedia — Shockley–Queisser limit (33.16% at 1.34 eV under AM1.5; ≈30% at 1.1 eV in the original 1961 paper; ≈19% below-gap and ≈33% thermalisation losses; ≈48% spectrum-only ceiling; 42%/49%/68.7% for 2/3/infinite junctions; 86.8% at maximum concentration): https://en.wikipedia.org/wiki/Shockley%E2%80%93Queisser_limit
• Shockley, W. & Queisser, H. J., 'Detailed Balance Limit of Efficiency of p-n Junction Solar Cells', Journal of Applied Physics 32, 510 (1961): https://doi.org/10.1063/1.1736034
• Wikipedia — Solar cell efficiency (crystalline silicon limit 29.43%; 26.63% heterojunction cell, 2017; perovskite–silicon tandem 32.5%, 2022; Fraunhofer ISE four-junction CPV 47.6%, May 2022; best commercial modules ≈24.5% as of 2025; 0.60 V at 25 °C falling to 0.55 V at ~45 °C; fill factor ≈80% for a normal silicon cell): https://en.wikipedia.org/wiki/Solar_cell_efficiency
• Wikipedia — Band gap (silicon ≈1.12 eV): https://en.wikipedia.org/wiki/Band_gap
• Wikipedia — p–n junction (diffusion, depletion region, built-in potential): https://en.wikipedia.org/wiki/P%E2%80%93n_junction
• Wikipedia — Solar cell (doping, charge separation, cells in series): https://en.wikipedia.org/wiki/Solar_cell
• Wikipedia — Maximum power point tracking (perturb and observe; shifting MPP; partial-shading local maxima): https://en.wikipedia.org/wiki/Maximum_power_point_tracking

Every Wunder lesson is built from real, reputable sources — never invented.

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